Vias are an important knowledge point in PCB design, especially for high-speed multi-layer PCB design. The design of vias needs to attract the attention of engineers. Next, let’s learn about via knowledge in PCB design with 2PCB.
Type of via
Vias are generally divided into three categories: through holes, blind holes and buried holes.
Blind holes: refers to the top and bottom surfaces of printed circuit boards, with a certain depth, used to connect the surface circuits and the inner circuits below. The depth and diameter of the holes usually do not exceed a certain ratio.
Buried via: refers to the connection hole located on the inner layer of the printed circuit board, which does not extend to the surface of the circuit board.
Through holes: These holes pass through the entire circuit board and can be used for internal interconnections or as mounting positioning holes for components. Because through holes are easier to implement in terms of technology and have lower costs, they are generally used in printed circuit boards.
Via design rules
Integrating design and production, engineers need to consider the following issues:
(1) The via hole cannot be located on the pad;
(2) There must be no via holes within the 1.5mm area extending outward from the contact area between the device metal shell and the PCB.
(3) There should be no via holes in the patch glue dispensing or printing area. For example, the PCB area under CHIP and SOP components using patch glue dispensing or printing processes.
(4) In principle, the inner diameter of the full through hole is required to be 0.2mm (8mil) or above, and the outer diameter is 0.4mm (16mil) or above. Where there are difficulties, the outer diameter must be controlled to 0.35mm (14mil).
(5) It is recommended not to use buried blind holes for BGA designs of 0.65mm and above, as the cost will increase significantly.
(6) The distance between vias should not be too close. Drilling can easily cause holes. Generally, the distance between holes is required to be 0.5mm and above, 0.35mm-0.4mm should be avoided, and 0.3mm and below is prohibited.
Vias in ordinary PCB
In ordinary PCB design, the parasitic capacitance and parasitic inductance of vias have little impact on PCB design. For 1-4 layer PCB design, 0.36mm/0.61mm/1.02mm (drilling/pad/POWER isolation area) is generally used. ) has better via holes. For some signal lines with special requirements (such as power lines, ground wires, clock lines, etc.), 0.41mm/0.81mm/1.32mm via holes can be used, and other sizes of via holes can also be selected according to actual conditions.
Vias in high-speed PCBs
1. Impact
In high-speed PCB multi-layer boards, signal transmission from one layer of interconnection lines to another layer of interconnection lines requires vias to achieve connection. When the frequency is lower than 1GHz, vias can play a good connection role. Its parasitic capacitance and inductance can be ignored.
When the frequency is higher than 1 GHz, the impact of the parasitic effects of vias on signal integrity cannot be ignored. At this time, the vias appear as discontinuous impedance breakpoints on the transmission path, which will cause signal reflection, delay, and attenuation. and other signal integrity issues.
When a signal is transmitted to another layer through a via, the reference layer of the signal line also serves as the return path of the via signal, and the return current will flow between the reference layers through capacitive coupling, causing problems such as ground bounce.
2. Design
It can be seen that in high-speed PCB design, seemingly simple vias often bring great negative effects to the circuit design. In order to reduce the adverse effects caused by the parasitic effects of vias, engineers can try to do the following during design:
(1) Choose a reasonable via size. For multi-layer PCB designs with general density, it is better to use 0.25mm/0.51mm/0.91mm (drilling/pad/POWER isolation area) vias; for some high-density PCBs, 0.20mm/0.46 can also be used mm/0.86mm vias, you can also try non-through holes; for power or ground vias, you can consider using larger sizes to reduce impedance;
(2) The larger the POWER isolation area, the better. Considering the via density on the PCB, it is generally D1=D2+0.41;
(3) Try not to change layers of signal traces on the PCB, that is to say, minimize vias;
(4) Using a thinner PCB is beneficial to reducing the two parasitic parameters of via holes;
(5) The power and ground pins should be located close to the via holes. The shorter the leads between the via holes and the pins, the better, because they will increase the inductance. At the same time, the power and ground leads should be as thick as possible to reduce impedance;
(6) Place some grounding vias near the vias of the signal layer to provide short-distance loops for the signal.
