Some rules and reasons analysis of high-speed PCB design

As the signal rates of current electronic products continue to increase, “high-speed signals” have become very common in PCB design. Therefore, whether you are a beginner in PCB design or a PCB design practitioner, “high-speed PCB design” is a design skill that everyone must master, which includes PCB design theory and design specifications and rules.
Analysis of some rules for high-speed PCB design

1. When designing the PCB layout, the design principle of placing it in a straight line along the signal flow direction should be fully followed, and try to avoid going back and forth.

Cause analysis: Avoid direct signal coupling, which will affect signal quality.

2. If the PCB clock frequency exceeds 5MHZ or the signal rise time is less than 5ns, a multi-layer board design is generally required.

Reason analysis: This is the “55 principle” in PCB design. The signal loop area can be well controlled by using multi-layer boards.

3. In multi-layer boards, there should be no signal lines greater than 50MHZ on the TOP and BOTTOM layers of the board.

Reason analysis: It is best to route high-frequency signals between two plane layers to suppress their radiation into space.

4. On the PCB board, the filtering, protection and isolation components of the interface circuit should be placed close to the interface.

Cause analysis: It can effectively achieve the effects of protection, filtering and isolation.

5. If there are both filtering and protection circuits at the interface, the principle of protection first and then filtering should be followed.

Cause analysis: The protection circuit is used to suppress external overvoltage and overcurrent. If the protection circuit is placed after the filter circuit, the filter circuit will be damaged by overvoltage and overcurrent.

6. When laying out, ensure that the input and output lines of the filter circuit (filter), isolation and protection circuit do not couple with each other.

Cause analysis: When the input and output traces of the above circuit are coupled to each other, the filtering, isolation or protection effect will be weakened.

7. For multi-layer boards, the key wiring layers (layers where clock lines, buses, interface signal lines, RF lines, reset signal lines, chip select signal lines, and various control signal lines are located) should be adjacent to the complete ground plane, preferably between two ground planes.

Reason analysis: Key signal lines are generally strong radiation or extremely sensitive signal lines. Routing close to the ground plane can reduce the signal loop area, reduce its radiation intensity or improve its anti-interference ability.

8. Key signal traces must not be routed across partitioned areas (including reference plane gaps caused by vias and pads).

Cause analysis: Routing across partitions will increase the area of the signal loop.

9. The distance between the key signal line and the edge of the reference plane is ≥3H (H is the height of the line from the reference plane).

Cause analysis: Suppress edge radiation effect.

10. When there are high, medium and low speed circuits on the circuit board at the same time, the high and medium speed circuits should be kept away from the interface.

Cause analysis: Avoid high-frequency circuit noise from radiating outward through the interface.

Knowledge expansion: What is “high-speed signal”

What is a high-speed signal? How to judge high-speed signals? Cadence defines this:

1) Any signal greater than 50MHz is a high-speed signal.

2) Whether the signal is high-speed is not directly related to the frequency, but when the rising/falling edge of the signal is less than 50ps, it is considered a high-speed signal.

3) When the length of the transmission path where the signal is located is greater than 1/6λ, the signal is considered a high-speed signal.

4) When a signal is transmitted along a transmission path and suffers from severe skin effect and ionization loss, it is considered a high-speed signal.


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